IBM, Lam Target Sub-1nm Chips

IBM, Lam Target Sub-1nm Chips

11 March 2026

What happened

IBM and Lam Research began a five-year collaboration at IBM Research's NY Creates Albany NanoTech Complex to develop materials and fabrication processes for logic chips beyond 1nm. This effort focuses on High NA EUV lithography and Lam's Aether dry resist technology. The partnership will validate full process flows for nanosheet and nanostack device architectures and backside power delivery, utilising Lam's Kiyo, Akara etch, Striker, and ALTUS Halo deposition systems. This extends a decade-long partnership that included 7nm process development and IBM's 2nm chip in 2021.

Why it matters

This collaboration accelerates the semiconductor industry's roadmap towards sub-1nm logic, directly impacting future chip performance and power efficiency. For chip designers and hardware architects, it signals the viability of advanced device architectures like nanosheet and nanostack, pushing the physical limits of transistor density. The focus on High NA EUV and dry resist technology, following ASML's increased EUV output, indicates a concerted industry push to overcome critical patterning challenges for next-generation computing.

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Published on 11 March 2026

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IBM, Lam Target Sub-1nm Chips